From: Len Brown <len.brown@intel.com>
Date: Mon, 10 Mar 2014 10:14:25 +0000 (+0100)
Subject: x86/mwait_idle: support Intel Atom Processor C2000 product family
X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~5502
X-Git-Url: https://dgit.raspbian.org/%22http:/www.example.com/cgi/%22https:///%22http:/www.example.com/cgi/%22https:/?a=commitdiff_plain;h=bf15e5b64e262b5e44244f4ea605de25d6af1ea6;p=xen.git

x86/mwait_idle: support Intel Atom Processor C2000 product family

Support the "Intel(R) Atom(TM) Processor C2000 Product Family",
formerly code-named Avoton.  It is based on the next generation
Intel Atom processor architecture, formerly code-named Silvermont.

Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
---

diff --git a/xen/arch/x86/cpu/mwait-idle.c b/xen/arch/x86/cpu/mwait-idle.c
index 85179f2f81..72a7abff4f 100644
--- a/xen/arch/x86/cpu/mwait-idle.c
+++ b/xen/arch/x86/cpu/mwait-idle.c
@@ -1,7 +1,7 @@
 /*
  * mwait_idle.c - native hardware idle loop for modern processors
  *
- * Copyright (c) 2010, Intel Corporation.
+ * Copyright (c) 2013, Intel Corporation.
  * Len Brown <len.brown@intel.com>
  *
  * This program is free software; you can redistribute it and/or modify it
@@ -301,6 +301,22 @@ static const struct cpuidle_state atom_cstates[] = {
 	{}
 };
 
+static const struct cpuidle_state avn_cstates[] = {
+	{
+		.name = "C1-AVN",
+		.flags = MWAIT2flg(0x00),
+		.exit_latency = 2,
+		.target_residency = 2,
+	},
+	{
+		.name = "C6-AVN",
+		.flags = MWAIT2flg(0x51) | CPUIDLE_FLAG_TLB_FLUSHED,
+		.exit_latency = 15,
+		.target_residency = 45,
+	},
+	{}
+};
+
 static void mwait_idle(void)
 {
 	unsigned int cpu = smp_processor_id();
@@ -436,6 +452,11 @@ static const struct idle_cpu idle_cpu_hsw = {
 	.disable_promotion_to_c1e = 1,
 };
 
+static const struct idle_cpu idle_cpu_avn = {
+	.state_table = avn_cstates,
+	.disable_promotion_to_c1e = 1,
+};
+
 #define ICPU(model, cpu) { 6, model, &idle_cpu_##cpu }
 
 static struct intel_idle_id {
@@ -459,6 +480,7 @@ static struct intel_idle_id {
 	ICPU(0x3f, hsw),
 	ICPU(0x45, hsw),
 	ICPU(0x46, hsw),
+	ICPU(0x4d, avn),
 	{}
 };